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» Software Hardware Co-Scheduling for Reconfigurable Computing...
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PVG
2003
IEEE
138views Visualization» more  PVG 2003»
14 years 2 months ago
Sort-First, Distributed Memory Parallel Visualization and Rendering
While commodity computing and graphics hardware has increased in capacity and dropped in cost, it is still quite difficult to make effective use of such systems for general-purpos...
E. Wes Bethel, Greg Humphreys, Brian E. Paul, J. D...
AFRICACRYPT
2009
Springer
14 years 3 months ago
Breaking KeeLoq in a Flash: On Extracting Keys at Lightning Speed
We present the first simple power analysis (SPA) of software implementations of KeeLoq. Our attack drastically reduces the efforts required for a complete break of remote keyless...
Markus Kasper, Timo Kasper, Amir Moradi, Christof ...
STTT
1998
130views more  STTT 1998»
13 years 8 months ago
The Practitioner's Guide to Coloured Petri Nets
Abstract. Coloured Petri nets (CP-nets or CPNs) provide a framework for the design, specification, validation, and verification of systems. CP-nets have a wide range of applicati...
Lars Michael Kristensen, Søren Christensen,...
CODES
2005
IEEE
14 years 2 months ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
SCOPES
2004
Springer
14 years 2 months ago
An Integer Linear Programming Approach to Classify the Communication in Process Networks
New embedded signal processing architectures are emerging that are composed of loosely coupled heterogeneous components like CPUs or DSPs, specialized IP cores, reconfigurable uni...
Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere