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CODES
2005
IEEE
14 years 2 months ago
Iterational retiming: maximize iteration-level parallelism for nested loops
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP) applications. It is important to study effective and efficient transformation ...
Chun Xue, Zili Shao, Meilin Liu, Edwin Hsing-Mean ...
ICSE
2008
IEEE-ACM
14 years 9 months ago
Design and implementation of the software architecture for a 3-D reconstruction system in medical imaging
The design and implementation of the reconstruction system in medical X-ray imaging is a challenging issue due to its immense computational demands. In order to ensure an efficien...
Holger Scherl, Stefan Hoppe, Markus Kowarschik, Jo...
FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
14 years 25 days ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
EUROMICRO
1996
IEEE
14 years 18 days ago
Behaviour-Preserving Transformations in SHE: A Formal Approach to Architecture Design
SHE (Software/Hardware Engineering) is an objectoriented analysis, specification and design method for complex reactive hardware/software systems. SHE is based on the formal speci...
Jeroen Voeten, P. H. A. van der Putten, M. P. J. S...
EMSOFT
2005
Springer
14 years 1 months ago
A unified HW/SW interface model to remove discontinuities between HW and SW design
One major challenge in System-on-Chip (SoC) design is the definition and design of interfaces between hardware and software. Traditional ASIC designer and software designer model ...
Aimen Bouchhima, Xi Chen, Frédéric P...