214 search results - page 22 / 43 » Software Performance Estimation in MPSoC Design |
CODES
2010
IEEE
13 years 5 months ago
2010
IEEE
This paper describes PowerBooter, an automated power model construction technique that uses built-in battery voltage sensors and knowledge of battery discharge behavior to monitor...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
CODES
2003
IEEE
14 years 25 days ago
2003
IEEE
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
CODES
2008
IEEE
13 years 9 months ago
2008
IEEE
This article proposes a hardware/software partitioning method targeted to performance-constrained systems for datapath applications. Exploiting a platform based design, a Timed Pe...