Sciweavers

214 search results - page 30 / 43
» Software Performance Estimation in MPSoC Design
Sort
View
ECMDAFA
2009
Springer
138views Hardware» more  ECMDAFA 2009»
14 years 2 months ago
A Pattern Mining Approach Using QVT
Model Driven Software Development (MDSD) has matured over the last few years and is now becoming an established technology. Models are used in various contexts, where the possibili...
Jens Kübler, Thomas Goldschmidt
DAC
1997
ACM
13 years 11 months ago
A Parallel/Serial Trade-Off Methodology for Look-Up Table Based Decoders
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
Claus Schneider
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
12 years 11 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
CASES
2003
ACM
14 years 23 days ago
Clustered calculation of worst-case execution times
Knowing the Worst-Case Execution Time (WCET) of a program is necessary when designing and verifying real-time systems. A correct WCET analysis method must take into account the po...
Andreas Ermedahl, Friedhelm Stappert, Jakob Engblo...
DAC
2005
ACM
14 years 8 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer