The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
Major research challenges in discovering Web services include, provisioning of services across multiple or heterogeneous registries, differentiating between services that share si...
As Web services proliferate, size and magnitude of UDDI Business Registries (UBRs) are likely to increase. The ability to discover Web services of interest then across multiple UB...
XML delivers key advantages in interoperability due to its flexibility, expressiveness, and platform-neutrality. As XML has become a performance-critical aspect of the next genera...
Morris Matsa, Eric Perkins, Abraham Heifets, Marga...