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    DAC
    2002
    ACM
    134views Computer Architecture» more  DAC 2002»
    Scheduler-based DRAM energy management
    14 years 9 months ago
    Scheduler-based DRAM energy management
    Download  www.cse.psu.edu
    Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
    Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
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    DAC
    2002
    ACM
    131views Computer Architecture» more  DAC 2002»
    Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver
    14 years 9 months ago
    Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver
    Download  www.iti.uni-stuttgart.de
    We propose Satisfiability Checking (SAT) techniques that lead to a consistent performance improvement of up to 3x over state-ofthe-art SAT solvers like Chaff on important problem ...
    Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao ...
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    DAC
    2002
    ACM
    116views Computer Architecture» more  DAC 2002»
    ILP-based engineering change
    14 years 9 months ago
    ILP-based engineering change
    Download  www.cs.ucla.edu
    We have developed a generic integer linear programming(ILP)based engineering change(EC) methodology. The EC methodology has three components: enabling, fast, and preserving. Enabl...
    Farinaz Koushanfar, Jennifer L. Wong, Jessica Feng...
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    DAC
    2004
    ACM
    225views Computer Architecture» more  DAC 2004»
    Abstraction of assembler programs for symbolic worst case execution time analysis
    14 years 9 months ago
    Abstraction of assembler programs for symbolic worst case execution time analysis
    Download  es.cs.uni-kl.de
    ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
    Klaus Schneider, Tobias Schüle
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    DAC
    2005
    ACM
    105views Computer Architecture» more  DAC 2005»
    Word level predicate abstraction and refinement for verifying RTL verilog
    14 years 9 months ago
    Word level predicate abstraction and refinement for verifying RTL verilog
    Download  www.kroening.com
    el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
    Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
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