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CODES
2007
IEEE
14 years 3 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
EVOW
2001
Springer
14 years 1 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
14 years 20 days ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
13 years 8 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
SIAMCOMP
2011
13 years 3 months ago
The Complexity of Early Deciding Set Agreement
Set agreement, where processors decisions constitute a set of outputs, is notoriously harder to analyze than consensus where the decisions are restricted to a single output. This ...
Eli Gafni, Rachid Guerraoui, Bastian Pochon