1406 search results - page 192 / 282 » Software trace cache |
IWCC
1999
IEEE
14 years 2 months ago
1999
IEEE
Using a cluster of commodity Alpha processors we compare two software platforms based on Linux and Windows NT and intended to support intensive scientic computations. Networking a...
HICSS
1995
IEEE
14 years 1 months ago
1995
IEEE
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
CF
2005
ACM
14 years 22 hour ago
2005
ACM
In this paper, we consider alternate ways of storing a sparse matrix and their effect on computational speed. They involve keeping both the indices and the non-zero elements in t...
SNPD
2003
13 years 11 months ago
2003
This paper focuses on non-strict processing, optimization, and partial evaluation of MPI programs which use incremental data structures (ISs). We describe the design and implement...
ASPDAC
2010
ACM
13 years 7 months ago
2010
ACM
This paper proposes a source-level timing annotation method for generation of accurate transaction level models for software computation modules. While Transaction Level Modeling ...