1406 search results - page 45 / 282 » Software trace cache |
EUROPAR
2010
Springer
13 years 8 months ago
2010
Springer
Abstract. This paper is motivated by the desire to provide an efficient and scalable software cache implementation of OpenMP on multicore and manycore architectures in general, and...
TC
2011
13 years 2 months ago
2011
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
Dynamically-loaded tagless loop caching reduces instruction fetch power for embedded software with small loops, but only supports simple loops without taken branches. Preloaded ta...
ISCA
1991
IEEE
13 years 11 months ago
1991
IEEE
We use mean value analysis models to compare representative hardware and software cache coherence schemes for a large-scale shared-memory system. Our goal is to identify the workl...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...