Sciweavers

596 search results - page 117 / 120
» Software transactional memory for multicore embedded systems
Sort
View
BIRTHDAY
2009
Springer
15 years 12 months ago
Vertical Object Layout and Compression for Fixed Heaps
Research into embedded sensor networks has placed increased focus on the problem of developing reliable and flexible software for microcontroller-class devices. Languages such as ...
Ben Titzer, Jens Palsberg
EMSOFT
2008
Springer
15 years 7 months ago
Tax-and-spend: democratic scheduling for real-time garbage collection
Real-time Garbage Collection (RTGC) has recently advanced to the point where it is being used in production for financial trading, military command-and-control, and telecommunicat...
Joshua S. Auerbach, David F. Bacon, Perry Cheng, D...
FDL
2003
IEEE
15 years 10 months ago
Object-Oriented ASIP Design and Synthesis
SystemC-Plus from the ODETTE project provides the ability to simulate and synthesise object-oriented specifications into hardware. The current ODETTE compiler translates each obj...
Maziar Goudarzi, Shaahin Hessabi, Alan Mycroft
CASES
2007
ACM
15 years 9 months ago
A fast and generic hybrid simulation approach using C virtual machine
Instruction Set Simulators (ISSes) are important tools for cross-platform software development. The simulation speed is a major concern and many approaches have been proposed to i...
Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Asch...
CODES
2003
IEEE
15 years 10 months ago
Accurate estimation of cache-related preemption delay
Multitasked real-time systems often employ caches to boost performance. However the unpredictable dynamic behavior of caches makes schedulability analysis of such systems difficul...
Hemendra Singh Negi, Tulika Mitra, Abhik Roychoudh...