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» Software transactional memory for multicore embedded systems
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ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 4 months ago
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
Junhyung Um, Taewhan Kim
HPCA
2006
IEEE
14 years 8 months ago
The common case transactional behavior of multithreaded programs
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen...
DAC
2009
ACM
14 years 11 days ago
Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
José Baiocchi, Bruce R. Childers
LCTRTS
1999
Springer
13 years 12 months ago
Why SpecInt95 Should Not Be Used to Benchmark Embedded Systems Tools
The SpecInt95 benchmark suite is often used to evaluate the performance of programming tools, including those used for embedded systems programming. Embedded applications, however...
Jakob Engblom
WOSP
2010
ACM
14 years 2 months ago
Analytical modeling of lock-based concurrency control with arbitrary transaction data access patterns
Nowadays the 2-Phase-Locking (2PL) concurrency control algorithm still plays a core rule in the construction of transactional systems (e.g. database systems and transactional memo...
Pierangelo di Sanzo, Roberto Palmieri, Bruno Cicia...