This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
The three main assertion-based verification approaches are: Design by Contract (DBC), Extended Static Checking (ESC) and Verified Design by Contract (VDBC). Each approach offers a...
We describe a novel approach to verification of software systems centered around an underlying database. Instead of applying general-purpose techniques with only partial guarantee...
Abstract. In the classic approach to logic model checking, software verification requires a manually constructed artifact (the model) to be written in the language that is accepted...
Abstract. We present a framework that unifies unit testing and runtime verification (as well as static verification and static debugging). A key contribution of our overall approac...
Edison Mera, Manuel V. Hermenegildo, Pedro L&oacut...