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ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 7 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
AIRS
2010
Springer
13 years 5 months ago
Tuning Machine-Learning Algorithms for Battery-Operated Portable Devices
Machine learning algorithms in various forms are now increasingly being used on a variety of portable devices, starting from cell phones to PDAs. They often form a part of standard...
Ziheng Lin, Yan Gu, Samarjit Chakraborty
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
11 years 10 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...
IPPS
2007
IEEE
14 years 2 months ago
A Portable Framework for High-Speed Parallel Producer/Consumers on Real CMP, SMT and SMP Architectures
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
Richard T. Saunders, Clinton L. Jeffery, Derek T. ...
ACSAC
2006
IEEE
13 years 11 months ago
CryptoPage: An Efficient Secure Architecture with Memory Encryption, Integrity and Information Leakage Protection
Several secure computing hardware architectures using memory encryption and memory integrity checkers have been proposed during the past few years to provide applications with a t...
Guillaume Duc, Ronan Keryell