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ISQED
2002
IEEE
111views Hardware» more  ISQED 2002»
14 years 9 days ago
Optimization of the Power/Ground Network Wire-Sizing and Spacing Based on Sequential Network Simplex Algorithm
This paper presents a fast algorithm to optimize both the widths and lengths of power/ground networks under reliability and power dip/ground bounce constraints. The spacesizing wh...
Ting-Yuan Wang, Charlie Chung-Ping Chen
JCP
2008
118views more  JCP 2008»
13 years 7 months ago
Power-efficient Instruction Encoding Optimization for Various Architecture Classes
A huge application domain, in particular, wireless and handheld devices strongly requires flexible and powerefficient hardware with high performance. This can only be achieved with...
Diandian Zhang, Anupam Chattopadhyay, David Kammle...
CF
2010
ACM
14 years 15 days ago
Interval-based models for run-time DVFS orchestration in superscalar processors
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
Georgios Keramidas, Vasileios Spiliopoulos, Stefan...
APCSAC
2007
IEEE
14 years 1 months ago
Runtime Performance Projection Model for Dynamic Power Management
In this paper, a runtime performance projection model for dynamic power management is proposed. The model is built as a first-order linear equation using a linear regression model....
Sang Jeong Lee, Hae-Kag Lee, Pen-Chung Yew
DSN
2011
IEEE
12 years 7 months ago
Cross-layer resilience using wearout aware design flow
—As process technology shrinks devices, circuits experience accelerated wearout. Monitoring wearout will be critical for improving the efficiency of error detection and correctio...
Bardia Zandian, Murali Annavaram