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GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 7 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
164
Voted
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
16 years 2 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal
110
Voted
NOCS
2007
IEEE
15 years 8 months ago
On Characterizing Performance of the Cell Broadband Engine Element Interconnect Bus
Abstract – With the rise of multicore computing, the design of onchip networks (or networks on chip) has become an increasingly important component of computer architecture. The ...
Thomas William Ainsworth, Timothy Mark Pinkston
166
Voted
CORR
2010
Springer
169views Education» more  CORR 2010»
15 years 2 months ago
Spiking Neurons with ASNN Based-Methods for the Neural Block Cipher
Problem statement: This paper examines Artificial Spiking Neural Network (ASNN) which inter-connects group of artificial neurons that uses a mathematical model with the aid of blo...
Saleh Ali K. Al-Omari, Putra Sumari
139
Voted
WWW
2009
ACM
16 years 3 months ago
Collective privacy management in social networks
Social Networking is one of the major technological phenomena of the Web 2.0, with hundreds of millions of people participating. Social networks enable a form of self expression f...
Anna Cinzia Squicciarini, Mohamed Shehab, Federica...
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