This work presents a memory-efficient All-SAT engine which, given a propositional formula over sets of important and non-important variables, returns the set of all the assignments...
The increasing popularity of SAT and BDD techniques in verification and synthesis encourages the search for additional speed-ups. Since typical SAT and BDD algorithms are exponent...
Currently, Graphplan and Blackbox, which converts Graphplan's plan graph into the satisfaction (SAT) problem, are two of the most successful planners. Since Graphplan gains i...
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre
This paper presents a verification technique for functional comparison of large combinational circuits using a novel combination of known approaches. The idea is based on a tight...