Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
Image computation nds wide application in VLSI CAD, such as state reachability analysis in formal veri cation and synthesis, combinational veri cation, combinational and sequential...
Satisfiability algorithms have become one of the most practical and successful approaches for solving a variety of real-world problems, including hardware verification, experime...
Abstract— To compute collision-free and dynamicallyfeasibile trajectories that satisfy high-level specifications given in a planning-domain definition language, this paper prop...
In many planning situations, a planner is required to return a diverse set of plans satisfying the same goals which will be used by the external systems collectively. We take a do...
Biplav Srivastava, Tuan A. Nguyen, Alfonso Gerevin...