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» Some Experiments with the Performance of LAMP Architecture
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ICCAD
2009
IEEE
119views Hardware» more  ICCAD 2009»
13 years 5 months ago
Iterative layering: Optimizing arithmetic circuits by structuring the information flow
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
Ajay K. Verma, Philip Brisk, Paolo Ienne
IPPS
2010
IEEE
13 years 5 months ago
On the parallelisation of MCMC by speculative chain execution
Abstract--The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov C...
Jonathan M. R. Byrd, Stephen A. Jarvis, Abhir H. B...
JMM2
2006
146views more  JMM2 2006»
13 years 7 months ago
Probabilistic Algorithms, Integration, and Empirical Evaluation for Disambiguating Multiple Selections in Frustum-Based Pointing
There are a few fundamental pointing-based user interface techniques for performing selections in 3D environments. One of these techniques is ray pointing, which makes selections b...
Greg S. Schmidt, Dennis G. Brown, Erik B. Tomlin, ...
ICS
2004
Tsinghua U.
14 years 26 days ago
Evaluating support for global address space languages on the Cray X1
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...
Christian Bell, Wei-Yu Chen, Dan Bonachea, Katheri...
DAC
2004
ACM
14 years 8 months ago
Refining the SAT decision ordering for bounded model checking
Bounded Model Checking (BMC) relies on solving a sequence of highly correlated Boolean satisfiability (SAT) problems, each of which corresponds to the existence of counter-example...
Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio So...