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FPL
2004
Springer
95views Hardware» more  FPL 2004»
14 years 4 months ago
Increasing Pipelined IP Core Utilization in Process Networks Using Exploration
At Leiden Embedded Research Center, we are building a tool chain called Compaan/Laura that allows us to do fast mapping of applications written in Matlab onto reconfigurable platf...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
FPL
2006
Springer
158views Hardware» more  FPL 2006»
14 years 2 months ago
Placing Functionality in Fault-Tolerant Hardware/Software Reconfigurable Networks
A novel framework shows the potential of FPGA-based systems for increasing fault-tolerance and flexibility by placing functionality onto free hardware (HW) or software (SW) resour...
Thilo Streichert
ASAP
2005
IEEE
87views Hardware» more  ASAP 2005»
14 years 4 months ago
Expression Synthesis in Process Networks generated by LAURA
The COMPAAN/LAURA [18] tool chain maps nested loop applications written in Matlab onto reconfigurable platforms, such as FPGAs. COMPAAN rewrites the original Matlab application a...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
FPGA
2008
ACM
161views FPGA» more  FPGA 2008»
14 years 17 days ago
Implementing high-speed string matching hardware for network intrusion detection systems
This paper presents high-throughput techniques for implementing FSM based string matching hardware on FPGAs. By taking advantage of the fact that string matching operations for di...
Atul Mahajan, Benfano Soewito, Sai K. Parsi, Ning ...
ISAAC
1994
Springer
80views Algorithms» more  ISAAC 1994»
14 years 3 months ago
Unifying Themes for Network Selection
In this paper we present efficient deterministic and randomized algorithms for selection on any interconnection network when the number of input keys (n) is the number of processo...
Sanguthevar Rajasekaran, Wang Chen, Shibu Yooseph