Sciweavers

1083 search results - page 201 / 217
» Spatial Memory Streaming
Sort
View
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
14 years 1 months ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
PADS
2004
ACM
14 years 1 months ago
Space-Parallel Network Simulations Using Ghosts
We discuss an approach for creating a federated network simulation that eases the burdens on the simulator user that typically arise from more traditional methods for defining sp...
George F. Riley, Talal M. Jaafar, Richard M. Fujim...
ASPLOS
1994
ACM
13 years 11 months ago
Compiler Optimizations for Improving Data Locality
In the past decade, processor speed has become significantly faster than memory speed. Small, fast cache memories are designed to overcome this discrepancy, but they are only effe...
Steve Carr, Kathryn S. McKinley, Chau-Wen Tseng
LCR
2000
Springer
129views System Software» more  LCR 2000»
13 years 11 months ago
Run-Time Support for Distributed Sharing in Typed Languages
We present a new run-time system for typed programming languages that supports object sharing in a distributed system. The key insight in this system is that the ability to distin...
Y. Charlie Hu, Weimin Yu, Alan L. Cox, Dan S. Wall...
ISLPED
2010
ACM
202views Hardware» more  ISLPED 2010»
13 years 7 months ago
MODEST: a model for energy estimation under spatio-temporal variability
Estimation of static and dynamic energy of caches is critical for high-performance low-power designs. Commercial CAD tools performing energy estimation statically are not aware of...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...