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ISCA
1998
IEEE
126views Hardware» more  ISCA 1998»
13 years 12 months ago
Switcherland: A QoS Communication Architecture for Workstation Clusters
Computer systems have become powerful enough to process continuous data streams such as video or animated graphics. While processing power and communication bandwidth of today...
Hans Eberle, Erwin Oertli
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
13 years 11 months ago
Impact of Sharing-Based Thread Placement on Multithreaded Architectures
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
Radhika Thekkath, Susan J. Eggers
ISCA
1992
IEEE
113views Hardware» more  ISCA 1992»
13 years 11 months ago
Dynamic Dependency Analysis of Ordinary Programs
A quantitative analysis of program execution is essential to the computer architecture design process. With the current trend in architecture of enhancing the performance of unipr...
Todd M. Austin, Gurindar S. Sohi
EMSOFT
2006
Springer
13 years 11 months ago
Mixing signals and modes in synchronous data-flow systems
Synchronous data-flow languages such as Scade/Lustre manage infinite sequences, or streams, as primitive values making them naturally adapted to the description of datadominated s...
Jean-Louis Colaço, Grégoire Hamon, M...
CASES
2001
ACM
13 years 11 months ago
Heads and tails: a variable-length instruction format supporting parallel fetch and decode
Abstract. Existing variable-length instruction formats provide higher code densities than fixed-length formats, but are ill-suited to pipelined or parallel instruction fetch and de...
Heidi Pan, Krste Asanovic