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DATE
2004
IEEE
146views Hardware» more  DATE 2004»
13 years 11 months ago
Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...
Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nik...
CASES
2009
ACM
13 years 5 months ago
Mapping stream programs onto heterogeneous multiprocessor systems
This paper presents a partitioning and allocation algorithm for an iterative stream compiler, targeting heterogeneous multiprocessors with constrained distributed memory and any c...
Paul M. Carpenter, Alex Ramírez, Eduard Ayg...
ISCA
1994
IEEE
117views Hardware» more  ISCA 1994»
13 years 11 months ago
Evaluating Stream Buffers as a Secondary Cache Replacement
Today's commodity microprocessors require a low latency memory system to achieve high sustained performance. The conventional high-performance memory system provides fast dat...
Subbarao Palacharla, Richard E. Kessler
WWW
2003
ACM
14 years 8 months ago
Buffer Sharing for Proxy Caching of Streaming Sessions
With the falling price of the memory, an increasing number of multimedia servers and proxies are now equipped with a large memory space. Caching media objects in the memory of a p...
Songqing Chen, Bo Shen, Yong Yan, Xiaodong Zhang
MICRO
2009
IEEE
147views Hardware» more  MICRO 2009»
14 years 2 months ago
Complexity effective memory access scheduling for many-core accelerator architectures
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
George L. Yuan, Ali Bakhoda, Tor M. Aamodt