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» Specifying Asynchronous Transfer of Control
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ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
14 years 3 months ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
ATVA
2005
Springer
202views Hardware» more  ATVA 2005»
14 years 3 months ago
Model Checking Real Time Java Using Java PathFinder
Abstract. The Real Time Specification for Java (RTSJ) is an augmentation of Java for real time applications of various degrees of hardness. The central features of RTSJ are real t...
Gary Lindstrom, Peter C. Mehlitz, Willem Visser
COMCOM
2004
127views more  COMCOM 2004»
13 years 9 months ago
Traffic splitting in a network: split traffic models and applications
The contemporary high-speed networks, e.g. the Internet and asynchronous transfer mode (ATM) networks provide a convenient and cost-effective communication platform to carry the e...
Huei-Wen Ferng, Cheng-Ching Peng
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 8 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
FORTE
2003
13 years 11 months ago
QoS Functional Testing for Multi-media Systems
Abstract. In this paper, we propose a testing method for QoS functions in distributed multi-media systems, where we test whether playback of media objects is correctly implemented ...
Tao Sun, Keiichi Yasumoto, Masaaki Mori, Teruo Hig...