Sciweavers

256 search results - page 15 / 52
» Speculative Versioning Cache
Sort
View
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
14 years 1 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...
CC
2009
Springer
149views System Software» more  CC 2009»
14 years 8 months ago
Exploiting Speculative TLP in Recursive Programs by Dynamic Thread Prediction
Speculative parallelisation represents a promising solution to speed up sequential programs that are hard to parallelise otherwise. Prior research has focused mainly on parallelisi...
Lin Gao 0002, Lian Li 0002, Jingling Xue, Tin-Fook...
ICS
2009
Tsinghua U.
14 years 2 months ago
Combining thread level speculation helper threads and runahead execution
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
Polychronis Xekalakis, Nikolas Ioannou, Marcelo Ci...
HPCA
2007
IEEE
14 years 1 months ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
TC
2002
13 years 7 months ago
On Augmenting Trace Cache for High-Bandwidth Value Prediction
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction and speculatively executes its data-dependent instructions based on th...
Sang Jeong Lee, Pen-Chung Yew