256 search results - page 8 / 52 » Speculative Versioning Cache |
MICRO
1993
IEEE
13 years 11 months ago
1993
IEEE
In this paper, we present a novel mechanism that implements register renaming, dynamic speculation and precise interrupts. Renaming of registers is performed during the instructio...
NSDI
2010
13 years 9 months ago
2010
Early web content was expressed statically, making it amenable to straightforward prefetching to reduce userperceived network delay. In contrast, today's rich web application...
JSA
2008
13 years 7 months ago
2008
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
DOCENG
2007
ACM
13 years 11 months ago
2007
ACM
Optimisation of real world Variable Data printing (VDP) documents is a difficult problem because the interdependencies between layout functions may drastically reduce the number o...
ISCA
2005
IEEE
14 years 1 months ago
2005
IEEE
The load-store unit is a performance critical component of a dynamically-scheduled processor. It is also a complex and non-scalable component. Several recently proposed techniques...