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SPAA
2009
ACM
14 years 8 months ago
A lightweight in-place implementation for software thread-level speculation
Thread-level speculation (TLS) is a technique that allows parts of a sequential program to be executed in parallel. TLS ensures the parallel program's behaviour remains true ...
Cosmin E. Oancea, Alan Mycroft, Tim Harris
IWMM
2010
Springer
118views Hardware» more  IWMM 2010»
14 years 12 days ago
Speculative parallelization using state separation and multiple value prediction
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
Chen Tian, Min Feng, Rajiv Gupta
NETWORKING
2010
13 years 6 months ago
Speculative Validation of Web Objects for Further Reducing the User-Perceived Latency
Web caching techniques reduce user-perceived latency by serving the most popular web objects from an intermediate memory. In order to assure that reused objects are not stale, cond...
Josep Domènech, José A. Gil, Julio S...
MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
14 years 16 days ago
Pointer cache assisted prefetching
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
Jamison D. Collins, Suleyman Sair, Brad Calder, De...
OSDI
2008
ACM
14 years 8 months ago
Paravirtualized Paging
Conceptually, fast server-side page cache storage could dramatically reduce paging I/O. In this extended abstract, we speculate how such a device might be used, then show how it c...
Daniel J. Magenheimer, Chris Mason, Dave McCracken...