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DATE
2008
IEEE
114views Hardware» more  DATE 2008»
15 years 10 months ago
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
Sanghyun Park, Aviral Shrivastava, Yunheung Paek
ICASSP
2008
IEEE
15 years 10 months ago
Human perception of synthetic character emotions in the presence of conflicting and congruent vocal and facial expressions
Audio-visual emotion expression by synthetic agents is widely employed in research, industrial, and commercial applications. However, the mechanism through which people judge the ...
Emily Mower, Sungbok Lee, Maja J. Mataric, Shrikan...
ISCA
2008
IEEE
92views Hardware» more  ISCA 2008»
15 years 10 months ago
Counting Dependence Predictors
Modern processors rely on memory dependence prediction to execute load instructions as early as possible, speculating that they are not dependent on an earlier, unissued store. To...
Franziska Roesner, Doug Burger, Stephen W. Keckler
IPPS
2007
IEEE
15 years 10 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
IWPC
2005
IEEE
15 years 9 months ago
Theories, Methods and Tools in Program Comprehension: Past, Present and Future
Program comprehension research can be characterized by both the theories that provide rich explanations about how programmers comprehend software, as well as the tools that are us...
Margaret-Anne D. Storey