Sciweavers

215 search results - page 8 / 43
» Speed Scaling for Energy and Performance with Instantaneous ...
Sort
View
MICRO
2012
IEEE
231views Hardware» more  MICRO 2012»
11 years 10 months ago
What is Happening to Power, Performance, and Software?
The past 10 years have delivered two significant revolutions. (1) Microprocessor design has been transformed by the limits of chip power, wire latency, and Dennard scaling—leadi...
Hadi Esmaeilzadeh, Ting Cao, Xi Yang, Stephen Blac...
ICPADS
2005
IEEE
14 years 1 months ago
PRec-I-DCM3: A Parallel Framework for Fast and Accurate Large Scale Phylogeny Reconstruction
: Accurate reconstruction of phylogenetic trees very often involves solving hard optimization problems, particularly the maximum parsimony (MP) and maximum likelihood (ML) problems...
Cristian Coarfa, Yuri Dotsenko, John M. Mellor-Cru...
TVLSI
2008
85views more  TVLSI 2008»
13 years 7 months ago
Low-Complexity Policies for Energy-Performance Tradeoff in Chip-Multi-Processors
Chip-Multi-Processors (CMP) utilize multiple energy-efficient Processing Elements (PEs) to deliver high performance while maintaining an efficient ratio of performance to energy-c...
A. Elyada, Ran Ginosar, Uri Weiser
ICS
2010
Tsinghua U.
13 years 10 months ago
Clustering performance data efficiently at massive scales
Existing supercomputers have hundreds of thousands of processor cores, and future systems may have hundreds of millions. Developers need detailed performance measurements to tune ...
Todd Gamblin, Bronis R. de Supinski, Martin Schulz...
ICCD
2005
IEEE
134views Hardware» more  ICCD 2005»
14 years 4 months ago
Architectural Considerations for Energy Efficiency
The formal analysis of parallelism and pipelining is performed on an 8-bit Add-Compare-Select element of a Viterbi decoder. The results are quantified through a study of the delay...
Hoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija