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RTSS
2006
IEEE
14 years 4 months ago
Tightening the Bounds on Feasible Preemption Points
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
CODES
2005
IEEE
14 years 4 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
CRYPTO
2004
Springer
128views Cryptology» more  CRYPTO 2004»
14 years 3 months ago
Faster Correlation Attack on Bluetooth Keystream Generator E0
We study both distinguishing and key-recovery attacks against E0, the keystream generator used in Bluetooth by means of correlation. First, a powerful computation method of correla...
Yi Lu 0002, Serge Vaudenay
MICRO
2003
IEEE
128views Hardware» more  MICRO 2003»
14 years 3 months ago
IPStash: a Power-Efficient Memory Architecture for IP-lookup
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
Stefanos Kaxiras, Georgios Keramidas
GECCO
2003
Springer
107views Optimization» more  GECCO 2003»
14 years 3 months ago
Exploration of a Two Sided Rendezvous Search Problem Using Genetic Algorithms
The problem of searching for a walker that wants to be found, when the walker moves toward the helicopter when it can hear it, is an example of a two sided search problem which is ...
T. Q. S. Truong, A. Stacey