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ERSA
2006
99views Hardware» more  ERSA 2006»
13 years 11 months ago
Low Power Programmable FIR Filtering IP Cores Targeting System-on-a-Reprogrammable-Chip (SoRC)
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
Muhammad Akhtar Khan, Abdul Hameed, Ahmet T. Erdog...
CCS
2011
ACM
12 years 10 months ago
MIDeA: a multi-parallel intrusion detection architecture
Network intrusion detection systems are faced with the challenge of identifying diverse attacks, in extremely high speed networks. For this reason, they must operate at multi-Giga...
Giorgos Vasiliadis, Michalis Polychronakis, Sotiri...
CCR
2004
153views more  CCR 2004»
13 years 9 months ago
Tree bitmap: hardware/software IP lookups with incremental updates
IP address lookup is challenging for high performance routers because it requires a longest matching prefix at speeds of up to 10 Gbps (OC-192). Existing solutions have poor updat...
Will Eatherton, George Varghese, Zubin Dittia
ICCAD
2008
IEEE
153views Hardware» more  ICCAD 2008»
14 years 6 months ago
Boolean factoring and decomposition of logic networks
This paper presents new methods for restructuring logic networks based on fast Boolean techniques. The basis for these are 1) a cut based view of a logic network, 2) exploiting th...
Alan Mishchenko, Robert K. Brayton, Satrajit Chatt...
CEC
2008
IEEE
14 years 4 months ago
GPU based extraction of moving objects without shadows under intensity changes
— This paper proposes a GPU based algorithm for extracting moving objects in real time. The whole process of the proposed approach is handled on GPU. GPU is used for acceleration...
Shinji Fukui, Yuji Iwahori, Robert J. Woodham