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DAC
2002
ACM
14 years 8 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
ICSE
2008
IEEE-ACM
14 years 8 months ago
A verification system for timed interval calculus
Timed Interval Calculus (TIC) is a highly expressive set-based notation for specifying and reasoning about embedded real-time systems. However, it lacks mechanical proving support...
Chunqing Chen, Jin Song Dong, Jun Sun 0001
WWW
2008
ACM
14 years 8 months ago
Computing minimum cost diagnoses to repair populated DL-based ontologies
Ontology population is prone to cause inconsistency because the populating process is imprecise or the populated data may conflict with the original data. By assuming that the int...
Jianfeng Du, Yi-Dong Shen
CADE
2009
Springer
14 years 8 months ago
A Generalization of Semenov's Theorem to Automata over Real Numbers
Abstract This work studies the properties of finite automata recognizing vectors with real components, encoded positionally in a given integer numeration base. Such automata are us...
Bernard Boigelot, Jérôme Leroux, Juli...
HPCA
2005
IEEE
14 years 8 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob