Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...
We study complexity of the model-checking problems for LTL with registers (also known as freeze LTL and written LTL ) and for first-order logic with data equality tests (written F...
The aim of the present paper is to provide a metalogical systematisation in the area of deontic action logic based on Boolean algebra. Differences among the systems in question lie...
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
Joel Grodstein, Eric Lehman, Heather Harkness, Bil...
Concerned by the wall that Moore’s Law is expected to hit in the next decade, the integrated circuit community is turning to emerging nanotechnologies for continued device impro...