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» Stable models and difference logic
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INFSOF
2006
158views more  INFSOF 2006»
13 years 10 months ago
DEVSpecL: DEVS specification language for modeling, simulation and analysis of discrete event systems
Discrete EVent Systems Specification (DEVS) formalism supports specification of discrete event models in a hierarchical modular manner. This paper proposes a DEVS modeling languag...
Ki Jung Hong, Tag Gon Kim
ASYNC
2003
IEEE
97views Hardware» more  ASYNC 2003»
14 years 3 months ago
Energy and Performance Models for Clocked and Asynchronous Communication
Parameterized first-order models for throughput, energy, and bandwidth are presented in this paper. Models are developed for many common pipeline methodologies, including clocked...
Kenneth S. Stevens
DATE
2007
IEEE
165views Hardware» more  DATE 2007»
14 years 4 months ago
Boosting the role of inductive invariants in model checking
This paper focuses on inductive invariants in unbounded model checking to improve efficiency and scalability. First of all, it introduces optimized techniques to speedup the comp...
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
IRI
2007
IEEE
14 years 4 months ago
A Conceptual Data Model for the Architecture Exploration of Automotive Distributed Embedded Architectures
As design complexities increase exponentially, automotive designers need integrated tool environments enabling system-level analyses of alternative architectural solutions. Hence,...
Paolo Giusto, Sri Kanajan, Claudio Pinello, Max Ch...
ISQED
2007
IEEE
128views Hardware» more  ISQED 2007»
14 years 4 months ago
A Model for Timing Errors in Processors with Parameter Variation
Parameter variation in integrated circuits causes sections of a chip to be slower than others. To prevent any resulting timing errors, designers have traditionally designed for th...
Smruti R. Sarangi, Brian Greskamp, Josep Torrellas