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FPL
2009
Springer
161views Hardware» more  FPL 2009»
14 years 1 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
APSEC
1996
IEEE
14 years 1 months ago
M-base : An Application Development Environment for End-user Computing based on Message Flow
Explosive increase in end-user computing on distributed systems requires that end-users develop application software by themselves. One solution is given as aformula of "adom...
Takeshi Chusho, Yuji Konishi, Masao Yoshioka
ASPDAC
2007
ACM
100views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning
- For modern processor designs in nanometer technologies, both block and interconnect pipelining are needed to achieve multi-gigahertz clock frequency, but previous approaches cons...
Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong,...
EVOW
2006
Springer
14 years 25 days ago
Optimisation of Constant Matrix Multiplication Operation Hardware Using a Genetic Algorithm
Abstract. The efficient design of multiplierless implementations of constant matrix multipliers is challenged by the huge solution search spaces even for small scale problems. Prev...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
14 years 13 days ago
Optimizations of an application-level protocol for enhanced dependability in FlexRay
FlexRay [9] is an automotive standard for high-speed and reliable communication that is being widely deployed for next generation cars. The protocol has powerful errordetection me...
Wenchao Li, Marco Di Natale, Wei Zheng, Paolo Gius...