1186 search results - page 10 / 238 » State machine models of timing and circuit design |
DATE
1998
IEEE
13 years 12 months ago
1998
IEEE
We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to ident...
DSD
2002
IEEE
14 years 18 days ago
2002
IEEE
We use a formal tool to extract Finite State Machines (FSM) based representations (lists of states and transitions) of sequential circuits described by flip-flops and gates. The...
WSC
2000
13 years 9 months ago
2000
One of the approaches to modeling hybrid systems is to assign algebraic-differential equations describing the continuous behavior to states of state machines that represent discre...
ICCAD
1999
IEEE
13 years 12 months ago
1999
IEEE
In this paper, an internal design model called FunState (functions driven by state machines) is presented that enables the representation of different types of system components a...
FDL
2006
IEEE
14 years 1 months ago
2006
IEEE
Transaction Level Models are widely being used as high-level reference models during embedded systems development. High simulation speed and great modeling flexibility are the ma...