1186 search results - page 12 / 238 » State machine models of timing and circuit design |
ASPDAC
2000
ACM
14 years 20 hour ago
2000
ACM
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
ISQED
2003
IEEE
14 years 28 days ago
2003
IEEE
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
APSEC
2009
IEEE
13 years 5 months ago
2009
IEEE
Abstract--Formal methods are very useful in software industry and are becoming of paramount importance in practical engineering techniques. They involve the design and the modeling...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
MODELS
2009
Springer
14 years 2 months ago
2009
Springer
UML state machines are widely used for modeling software behavior. However state-crosscutting behaviors, such as synchronization or execution history dependence, are hard to model...