1186 search results - page 25 / 238 » State machine models of timing and circuit design |
ASPDAC
2001
ACM
13 years 11 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
EH
1999
IEEE
1999
IEEE
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
14 years 7 hour ago
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
ISLPED
1997
ACM
13 years 11 months ago
1997
ACM
- The objective of this paper is to provide an effective technique for accurate modeling of the external input sequences that affect the behavior of Finite State Machines (FSMs). B...
CONCUR
2000
Springer
13 years 11 months ago
2000
Springer
We introduce some new models of infinite-state transition systems. The basic model, called a (reversal-bounded) counter machine (CM), is a nondeterministic finite automaton augment...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we present a two-level modeling approach to performance macromodeling based on radial basis function Support Vector Machine (SVM). The two-level model consists of a...