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» State machine models of timing and circuit design
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IPPS
2003
IEEE
14 years 1 months ago
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
Dennis Abts, Steve Scott, David J. Lilja
ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
14 years 4 months ago
A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits
Modeling frequency-dependent nonlinear characteristics of complex analog blocks and subsystems is critical for enabling efficient verification of mixed-signal system designs. Rece...
Peng Li, Xin Li, Yang Xu, Lawrence T. Pileggi
VTS
1999
IEEE
81views Hardware» more  VTS 1999»
13 years 12 months ago
Simulation-Based Design Error Diagnosis and Correction in Combinational Digital Circuits
This paper describes an approach to design error diagnosis and correction in combinational digital circuits. Our approach targets small errors introduced during the design process...
Debashis Nayak, D. M. H. Walker
WWW
2005
ACM
14 years 8 months ago
On business activity modeling using grammars
Web based applications offer a mainstream channel for businesses to manage their activities. We model such business activity in a grammar-based framework. The Backus Naur form not...
Savitha Srinivasan, Arnon Amir, Prasad Deshpande, ...
AAAI
1997
13 years 9 months ago
Model Minimization in Markov Decision Processes
Many stochastic planning problems can be represented using Markov Decision Processes (MDPs). A difficulty with using these MDP representations is that the common algorithms for so...
Thomas Dean, Robert Givan