1186 search results - page 8 / 238 » State machine models of timing and circuit design |
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Most existing RCL−1 circuit reductions stamp inverse inductance L−1 elements by a second-order nodal analysis (NA). The NA formulation uses nodal voltage variables and describ...
DAC
1997
ACM
13 years 12 months ago
1997
ACM
- The objective of this paper is to provide an effective technique for accurate modeling of the external input sequences that affect the behavior of Finite State Machines (FSMs). T...
ICSE
2007
IEEE-ACM
14 years 1 months ago
2007
IEEE-ACM
Abstract. We describe an approach to designing and implementing a distributed system as a family of related finite state machines, generated from a single abstract model. Various a...
MICRO
2003
IEEE
14 years 27 days ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...