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IEEEPACT
2007
IEEE
14 years 1 months ago
A Flexible Heterogeneous Multi-Core Architecture
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
Miquel Pericàs, Adrián Cristal, Fran...
VLSID
2006
IEEE
169views VLSI» more  VLSID 2006»
14 years 1 months ago
A Low Leakage and SNM Free SRAM Cell Design in Deep Sub Micron CMOS Technology
As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. The gate oxide thickness in recent and future IC process technology has appro...
Sanjeev K. Jain, Pankaj Agarwal
SEMWEB
2007
Springer
14 years 1 months ago
Change Paths in Reasoning!
Millions of research funding has been put down to develop - what I call - old forms - of reasoning that are characterized by strong focus on theoretical properties and strict adher...
Raphael Volz
ANCS
2009
ACM
13 years 5 months ago
Design and performance analysis of a DRAM-based statistics counter array architecture
The problem of maintaining efficiently a large number (say millions) of statistics counters that need to be updated at very high speeds (e.g. 40 Gb/s) has received considerable re...
Haiquan (Chuck) Zhao, Hao Wang, Bill Lin, Jun (Jim...
AFRIGRAPH
2010
ACM
13 years 10 months ago
Progressive RBF interpolation
Interpolation based on Radial Basis Functions (RBF) is very often used for scattered scalar data interpolation in n-dimensional space in general. RBFs are used for surface reconst...
Václav Skala