119 search results - page 22 / 24 » Static Energy Reduction Techniques for Microprocessor Caches |
HPCA
2005
IEEE
14 years 1 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
ICMCS
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern multimedia applications possess a very dynamic use of the memory hierarchy depending on the actual input, therefore requiring run-time profiling techniques to enable optim...
VLSID
2007
IEEE
14 years 8 months ago
2007
IEEE
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
LCPC
2004
Springer
14 years 28 days ago
2004
Springer
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...