State-equivalence based reduction techniques, e.g. bisimulation minimization, can be used to reduce a state transition system to facilitate subsequent verification tasks. However...
A latch-based timing analyzer is an essential tool for developing high-speed pipeline designs. As process variations increasingly influence the timing characteristics of DSM desi...
Rob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, San...
Many automated static analysis (ASA) tools have been developed in recent years for detecting software anomalies. The aim of these tools is to help developers to eliminate software...
Business Artifacts are the core entities used by businesses to record information pertinent to their operations. Business operational models are representations of the processing ...
UML sequence diagrams are commonly used to represent the interactions among collaborating objects. Reverse-engineered sequence diagrams are constructed from existing code, and hav...