328 search results - page 56 / 66 » Static performance prediction of skeletal parallel programs |
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Branch prediction has enabled microprocessors to increase instruction level parallelism (ILP) by allowing programs to speculatively execute beyond control boundaries. Although spe...
APPT
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. With more cores integrated into one single chip, the overall power consumption from the multiple concurrent running programs increases dramatically in a CMP processor whi...
ICS
1989
Tsinghua U.
13 years 11 months ago
1989
Tsinghua U.
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
HPCA
2003
IEEE
14 years 7 months ago
2003
IEEE
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
IEEEPACT
2002
IEEE
14 years 9 days ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...