262 search results - page 19 / 53 » Static timing analysis for modeling QoS in networks-on-chip |
ISOLA
2010
Springer
13 years 5 months ago
2010
Springer
Abstract. The Implicit Path Enumeration Technique (IPET) has become widely accepted as a powerful technique to compute upper bounds on the Worst-Case Execution Time (WCET) of time-...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Accurate estimation of the worst-case execution time (WCET) of a program is important for real-time embedded software. Static WCET estimation involves program path analysis and ar...
TCAD
2010
13 years 6 months ago
2010
—With the scaling of complementary metal–oxide– semiconductor (CMOS) technology into the nanometer regime, the overshooting effect due to the input-to-output coupling capacit...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Many recent techniques for timing analysis under variability, in which delay is an explicit function of underlying parameters, may be described as parameterized timing analysis. T...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
In the nanometer manufacturing region, process variation causes significant uncertainty for circuit performance verification. Statistical static timing analysis (SSTA) is thus dev...