651 search results - page 2 / 131 » Statistical Approach to NoC Design |
ETS
2007
IEEE
14 years 1 months ago
2007
IEEE
The paper proposes a new concept of diagnosing faulty links in Network-on-a-Chip (NoC) designs. The method is based on functional fault models and it implements packet address dri...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Increasing miniaturization is posing multiple challenges to electronic designers. In the context of Multi-Processor System-onChips (MPSoCs), we focus on the problem of implementin...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
DSD
2010
IEEE
13 years 7 months ago
2010
IEEE
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
DELTA
2008
IEEE
14 years 1 months ago
2008
IEEE
— A novel approach for satisfying heterogeneous bandwidth requirements of clients connected using a modified Fat Tree network-on-chip is presented. The new approach allows the No...