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ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
14 years 7 months ago
Guaranteeing performance yield in high-level synthesis
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Wei-Lun Hung, Xiaoxia Wu, Yuan Xie
IPPS
2006
IEEE
14 years 4 months ago
Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
Kostas Siozios, Konstantinos Tatas, Dimitrios Soud...
IH
2004
Springer
14 years 3 months ago
Feature-Based Steganalysis for JPEG Images and Its Implications for Future Design of Steganographic Schemes
In this paper, we introduce a new feature-based steganalytic method for JPEG images and use it as a benchmark for comparing JPEG steganographic algorithms and evaluating their embe...
Jessica J. Fridrich
TIT
2010
105views Education» more  TIT 2010»
13 years 5 months ago
DMT optimality of LR-aided linear decoders for a general class of channels, lattice designs, and system models
The work identifies the first general, explicit, and non-random MIMO encoder-decoder structures that guarantee optimality with respect to the diversity-multiplexing tradeoff (DMT),...
Joakim Jalden, Petros Elia
SIGIR
2010
ACM
14 years 2 months ago
Reusable test collections through experimental design
Portable, reusable test collections are a vital part of research and development in information retrieval. Reusability is difficult to assess, however. The standard approach— si...
Ben Carterette, Evangelos Kanoulas, Virgiliu Pavlu...