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IPPS
2007
IEEE
14 years 5 months ago
Performance Analysis of a Family of WHT Algorithms
This paper explores the correlation of instruction counts and cache misses to runtime performance for a large family of divide and conquer algorithms to compute the Walsh–Hadama...
Michael Andrews, Jeremy Johnson
NIPS
2003
14 years 5 days ago
An MCMC-Based Method of Comparing Connectionist Models in Cognitive Science
Despite the popularity of connectionist models in cognitive science, their performance can often be difficult to evaluate. Inspired by the geometric approach to statistical model ...
Woojae Kim, Daniel J. Navarro, Mark A. Pitt, In Ja...
HOTOS
2007
IEEE
14 years 2 months ago
Processor Hardware Counter Statistics as a First-Class System Resource
Today's processors provide a rich source of statistical information on program execution characteristics through hardware counters. However, traditionally, operating system (...
Xiao Zhang, Sandhya Dwarkadas, Girts Folkmanis, Ka...
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 4 months ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas
DAC
2004
ACM
14 years 11 months ago
STAC: statistical timing analysis with correlation
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
Jiayong Le, Xin Li, Lawrence T. Pileggi