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DATE
2004
IEEE
130views Hardware» more  DATE 2004»
14 years 9 days ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
ISCA
2005
IEEE
121views Hardware» more  ISCA 2005»
14 years 2 months ago
Direct Cache Access for High Bandwidth Network I/O
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...
Ram Huggahalli, Ravi R. Iyer, Scott Tetrick
NCA
2005
IEEE
14 years 2 months ago
C-CORE: Using Communication Cores for High Performance Network Services
Recent hardware advances are creating multi-core systems with heterogeneous functionality. This paper explores how applications and middleware can utilize systems comprised of pro...
Sanjay Kumar, Ada Gavrilovska, Karsten Schwan, Sri...
JSA
2007
162views more  JSA 2007»
13 years 8 months ago
Exploration of distributed shared memory architectures for NoC-based multiprocessors
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
FPL
2005
Springer
111views Hardware» more  FPL 2005»
14 years 2 months ago
Mutable Codesign for Embedded Protocol Processing
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....