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CISS
2008
IEEE
14 years 3 months ago
2008
IEEE
Abstract—Cross-layer optimization including congestion control, routing, and scheduling has shown dramatic throughput improvement over layered designs for wireless networks. In p...
AAAI
2007
13 years 11 months ago
2007
We present black-box techniques for learning how to interleave the execution of multiple heuristics in order to improve average-case performance. In our model, a user is given a s...
SPAA
1995
ACM
14 years 18 days ago
1995
ACM
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...
ICS
2009
Tsinghua U.
13 years 6 months ago
2009
Tsinghua U.
In the search for high performance, most transactional memory (TM) systems execute atomic blocks concurrently and must thus be prepared for data conflicts. The TM system must then...
RTAS
2008
IEEE
14 years 3 months ago
2008
IEEE
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...