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» Strategies for Branch Target Buffers
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BCB
2010
150views Bioinformatics» more  BCB 2010»
13 years 3 months ago
Enzymatic target identification with dynamic states
As a metabolic network reaches from a state to a steady state, a subset of its fluxes gradually change. The sequence of intermediate states, called the dynamic state, shows the pa...
Bin Song, Sanjay Ranka, Tamer Kahveci
LCTRTS
2009
Springer
14 years 3 months ago
Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE)
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
Stephen Roderick Hines, Yuval Peress, Peter Gavin,...
ISVLSI
2008
IEEE
143views VLSI» more  ISVLSI 2008»
14 years 2 months ago
BTB Access Filtering: A Low Energy and High Performance Design
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
Shuai Wang, Jie Hu, Sotirios G. Ziavras
ISCAPDCS
2001
13 years 10 months ago
A Multiple Blocks Fetch Engine for High Performance Superscalar Processors
The implementation of modern high performance computer is increasingly directed toward parallelism in the hardware. However, most of the current fetch units are limited to one bra...
Yung-Chung Wu, Jong-Jiann Shieh
ISCA
1999
IEEE
88views Hardware» more  ISCA 1999»
14 years 25 days ago
A Scalable Front-End Architecture for Fast Instruction Delivery
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
Glenn Reinman, Todd M. Austin, Brad Calder